Title: Introducing hardware TLP support for the Cell processor Author(s): GIORGI,R.; POPOVIC,Z.; PUZOVIC,N. Source: Proceedings of IEEE International Workshop on Multi-Core Computing Systems Pages: 1-6 Published: 2009
added
01-Mar-09
3.
Title: Analyzing Scalability of Deblocking Filter of H.264 via TLP exploitation in a new many-core architecture Source: Proceedings of the 11th EUROMICRO-DSD Pages: 189-194 Published: 2008
added
01-Mar-09
4.
Title: Effects of Instruction-set Extensions on an Embedded Processor: a Case Study on Elliptic Curve Cryptography over GF(2/sup m/) Author(s): BARTOLINI,S.; BRANOVIC,I.; GIORGI,R.; et al. Source: IEEE Transactions on Computers Volume: 57 Issue: 5 Pages: 672-685 Published: 2008
added
01-Mar-09
5.
Title: Effects of instruction-set extensions on an embedded processor: A case study on elliptic-curve cryptography over GF(2(m)) Author(s): BARTOLINI, S; BRANOVIC, I; GIORGI, R; et al. Source: IEEE TRANSACTIONS ON COMPUTERS Volume: 57 Issue: 5 Pages: 672-685 Published: MAY 2008 Times Cited: 2 DOI: 10.1109/TC.2007.70832
added
01-Mar-09
6.
Title: Exploiting Parallelism of Deblocking Filter of H.264 on DTA architecture Source: HiPEAC ACACES-2008 Pages: 55-58 Published: 2008
added
01-Mar-09
7.
Title: Filtering drowsy instruction cache to achieve better efficiency Author(s): GIORGI,R.; BENNATI,P. Source: SAC '08: Proceedings of the 2008 ACM symposium on Applied computing Pages: 1554-1555 Published: 2008
added
01-Mar-09
8.
Title: Implementing DTA support in CellSim Author(s): GIORGI,R.; POPOVIC,Z.; PUZOVIC,N. Source: HiPEAC ACACES-2008 Pages: 159-162 Published: 2008
added
01-Mar-09
9.
Title: MEDEA '08: Proceedings of the 2008 workshop on MEmory performance Author(s): BARTOLINI,S.; FOGLIA,P.; GIORGI,R.; et al.
added
01-Mar-09
10.
Title: Reducing Leakage through Filter Cache Author(s): GIORGI,R.; BENNATI,P. Source: Proceedings of the 11th EUROMICRO-DSD Pages: 334-341 Published: 2008
